Phase locked loop (PLL) is an important component in communication. The PLL outputs an oscillator signal that is stabilized, i.e. locked, with respect to a phase and a frequency of an input reference signal. Nowadays, all-digital PLL (ADPLL) has been researched and developed to replace analog PLL because ADPLL is free from large analog loop filters and passive elements, and has much lower parameter variability and a fast design turn-around cycle using automated computer aided design (CAD) tools. Among the digital components of the ADPLL, a digital-controlled oscillator (DCO) is a block that actually generates the oscillator signal in response to control blocks in the ADPLL. To facilitate locking of the ADPLL, the DCO is divided into stages such that a frequency of the oscillator signal can be tuned by different step sizes.